Baud rate setting

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In "app_bs_sun_demo.c" of mini SUN7's example project, console serial port is initialized at speed of 57600 bps.

	//SerialInit(CONS_SER,8,0x35);				// 115200 from PCLK 40M
	SerialInit(CONS_SER,16,0x35);				// 57600 from PCLK 40M
	//SerialInit(CONS_SER,24,0x35);				// 38400 from PCLK 40M
	//SerialInit(CONS_SER,48,0x35);				// 19200 from PCLK 40M
	//SerialInit(CONS_SER,96,0x35);				// 9600 from PCLK 40M

To use the console serial port at other speeds, just run other line of code.


Anyway, if you want to understand more about function SerialInit(), this is explained here.

The function is in "serial_lpc23xx.c".

void SerialInit(unsigned char dev,unsigned char dll,unsigned char fdr)

"dev" means the serial device. CONS_SER, defined originally as 0, means that this serial port is used for console.

"dll" is the main divider. UART clock is divided from peripheral clock using this value.

"fdr" is the fractional divider. It makes UART clock more accurate to the speed required.


Using "SerialInit(CONS_SER,16,0x35)", first the peripheral clock is divided by "dll". The speed of the peripheral clock for UART is 40MHz (this comes from CPU speed divided by 3, that is, 120/3). Then this clock is divided by the fractional divider, which is 1+5/3 = 2.666 (see more detail from user manual). At this state we get:

40M/(16*2.66) = 937734.43 Hz

While an UART's clock speed must be 16 times of required baud rate to sample incoming data, we get the baud rate:

937734.43/16 = 58608.40 bps

And the error is:

(58608.40-57600)/57600 * 100 = 1.75%

That is sufficient for the communication.


Now to use other baud rate, the fractional divider can be left untouched. Only the main divider is modified. Notice that the product of required baud rate and the main divider is a constant value.

8 x 115200 = 921600
16 x 57600 = 921600
24 x 38400 = 921600
...
96 x 9600   = 921600

So you can find "dll" for your required baud rate by just using some equations.


Applying this to SUN7 board (LPC2478 running at 68.57MHz, peripheral clock is 17.1428MHz), we get:

	//SerialInit(CONS_SER,4,0x34);				// 115200 from PCLK 17.1428M
	SerialInit(CONS_SER,8,0x34);				// 57600 from PCLK 17.1428M
	//SerialInit(CONS_SER,12,0x34);				// 38400 from PCLK 17.1428M
	//SerialInit(CONS_SER,24,0x34);				// 19200 from PCLK 17.1428M
	//SerialInit(CONS_SER,48,0x34);				// 9600 from PCLK 17.1428M
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